Dynamic Random Access Memory Devices (DRAMs) have become the standard type of storage device in modern computer systems. Modern DRAMs are high density, highly integrated structures having a variety of configurations, most typically stacked and trench configurations. As ever increasing density is sought, more sophisticated manufacturing processes and materials are required to achieve sub micron sized electrical component layers with reliable conformity to operational specifications.
As density increases, the minimum feature sizes of DRAM components approach 100 nm and smaller. For example, the gate dielectric material thickness of MOS devices may be required to be 20 nm (200 Å) or less in certain designs. In this thickness range the most commonly used gate dielectrics, SiO2, is not suitable because of leakage current caused by direct tunneling. As a result, gate dielectric materials with high dielectric constants (k) and large band gap with a favorable band alignment, low interface density, and good thermal stability are needed for future gate dielectric applications.
There are many known high-k unilaminate dielectric materials with high dielectric constants, such as Ta2O5, TiO2 and SrTiO3, but unfortunately these materials are not thermally stable when formed directly in contact with silicon. In addition, the interface of such materials need to be coated with a diffusion barrier, which not only adds process complexity, but also defeats the purpose of using the high-k dielectric. This added interfacial layer becomes a series capacitor to the gate capacitance, and degrades the high capacitance. Moreover, materials having too high or too low a dielectric constant may not be an adequate choice for alternate gate applications. Ultra high-k materials such as SrTiO3 may cause fringing-field induced barrier lowering effect. On the other hand, materials with relatively low dielectric constant such as Al2O3 and Y2O3 do not provide sufficient advantage over the SiO2 or Si3N4.
Lanthanide oxides have also been investigated as possible dielectric materials for use in gate dielectric oxides. Jeon et al reported an investigation of the electrical characteristics of amorphous lanthanide oxides prepared by electron beam evaporation and sputtering (Jeon et al., Technical Digest of Int'l Electron Devices Meetings, 471–474, 2001). Excellent electrical characteristics were found for the amorphous lanthanide oxides including a high oxide capacitance, low leakage current, and high thermal stability. Typical dielectric constants ranged between 11.4 and 15.0 in thin samples. Accordingly, lanthanide oxides alone may be a suitable alternative for certain applications using single layers of dielectric material. Also, a single layer of ZrO2 may be used in certain applications. Recently, a zirconium oxide layer formed by atomic layer deposition (ALD) from an iodide precursor was shown to have exhibit a relative permititivity at 10 kHz of about 23–24 for films deposited at 275–325° C. (Kukli et al, Thin Solid Films 410, 53–56 (2003)).
An alternative configuration for gate electrode dielectric layers is a composite laminate dielectric layer made of two or more layers of different materials. Thin (about 10 nm) nanolaminate dielectric materials made of layers of tantalum oxide and hafnium oxide (Ta2O5-HfO2), tantalum oxide and zirconium oxide (Ta2O5—ZrO2) or zirconium oxide hafnium oxide (ZrO2—HfO2) deposited on a silicon substrate by ALD were characterized for possible gate dielectric applications by Zhang et al, J. App. Physics, 87 (4) 1921–1924 (2000). The dielectric constants of these films were in the range of 12–14 and the leakage currents were in the range of 2.6×10−8 to 4.2×10−7 A/cm at 1.0 MV/cm−2 electric field.
The ALD method of forming layers is also known as “alternately pulsed chemical vapor deposition.” ALD was developed as a modification of conventional CVD techniques. While there are a variety of variations on ALD, the most commonly used method is reaction sequence ALD (RS-ALD). In RS-ALD, gaseous precursors are introduced one at a time to the substrate surface in separate pulses. Between pulses, the reactor is purged with an inert gas or is evacuated. In the first reaction step, the precursor is saturatively chemi-adsorbed at the substrate surface, and during the subsequent purging step, free precursor is removed from the reactor. In the second step, another precursor is introduced on the substrate and the desired film growth reaction takes place on the substrate surface. When the chemistry is favorable, the precursors adsorb and react with each other aggressively forming the film. Subsequent to film growth, the by-products and excess precursors are finally purged from the reactor. One advantage of RS-ALD is that one cycle of first precursor depositing, purging, second precursor depositing, reaction, and final purging can be performed in less than one second in a properly designed flow type reactor.
One striking feature of RS-ALD is the saturation of all the reaction and purging steps, which makes the growth self-limiting. This allows for large area uniformity and conformality to planar substrates and deep trenches, even in the extreme cases of porous silicon or high surface area silica and alumina powders. The control of film thickness is straight forward and can be made by simply calculating the growth cycles. ALD was originally developed to manufacture luminescent and dielectric films needed for electroluminescent displays where much effort was put to the growth of doped zinc sulfide an alkaline earth metal sulfide films. Later ALD was studied for the growth of different epitaxial composite II–V, and II–VI films, nonepitaxial crystalline or amorphous oxide and nitride firms in composite multiplaner structures. Unfortunately however, although considerable effort was put into use of ALD for growth of silicon and germanium films, difficult precursor chemistry precluded success in this area.
There is therefore a need in the art to provide other types of composite laminate dielectric layers, particularly using the favorable features of RS-ALD deposition methods.